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Single chip digital PLC modem

Single chip digital PLC modem

Several technologies are available to establish communication between the consumer’s electricity meter and the utility – the telephone network, radio waves and PLC. In this context PLC presents competitive advantages, as the network medium already exists.

Since the network is fully owned by the utility company, new opportunities can be exploited. For example, the power line can be used as a telecommunication network. The main component of such a communication system is the PLC modem, which allows communication between users and data concentrators to be established. This last connection point is located at the interfaces between low-voltage and medium-voltage.

Standards based on various transmission techniques are emerging. This paper describes the development of a power line modem compliant to IEC 1334 [Ref.1-3]. It uses half-duplex, 300 to 1200 bits per second data streams (up to 1440 b/s on 60 Hz networks) which are modulated into the 9 to 95 kHz frequency A-band. Bits modulation uses a Spread Frequency Shift Keying (S-FSK) scheme.

The modem features three possible node configurations – server, client and monitor configuration.


The architecture involves digital signal processing techniques (DSP). (See figure 1). The affected functions such as modulator, demodulator, low pass filter and synchroniser are implemented as digital functions. This allows an overall cost reduction and improved programmability for other applications.

S-PSK circuit block diagram

Unlike existing implementations, the circuit handles the transport layer of the protocol (MAC layer). This is done in firmware running on the embedded microprocessor. The circuit makes use of the ARM 7TDMi microprocessor core from Advanced Risk Machine Ltd.

The analogue front end primarily consists of a very high dynamic range receiver and a direct synthesis transmitter. A straight conversion of the full signal band from 9KHz to 95KHz is performed in the receiver by means of a low power, high resolution analogue-to-digital converter.

Table 1: Main modem performance
Parameter Value
Modulations S-FSK, programmable interval
Bit rates, 60Hz mains 360, 720, 1440 bits/s
Bit rates, 50Hz mains 300, 600, 1200 bits/s
Signal bandwidth 9-95 kHz (-3dB)
Mains frequency PLL jitter 0.1 Hz/s max deviation allowed on 50Hz
Modulation frequencies 9-95 kHz by steps of 11Hz
RX dynamic range 104 dB
RX noise 20 nV/sqrtHz
THD-TX (100KHz, 2Vpp) 63 dB
PSRR 20 dB
On chip oscillator 24 MHz
Chip digital area % 87
Analogue front end area % 13
Power supply 3 Volts
Power consumption 65 mW average (it depends on baud rate)

The modulation protocol defines the start of the data frame synchronously with the zero crossing of the mains frequency. In order to generate reliable information about the zero crossing, a digital phase locked loop (PLL) is used to eliminate the parasitic crossing of the zero volt due to disturbances on the mains. The output frequency of the PLL is eight times the bit frequency. This over-sampling of the bit is used to recover up to 360 degrees phase shift. It allows recovery from delay on the transmission line and also detection of data transmitted on a different phase for 3-phase mains.

The interface to the application is done through an RS232 compatible serial interface. This is used for data transmission with the application hardware (concentrator, power meter) and for the set-up of the modem configuration.

The circuit is realised in a state-of-the-art mixed mode 0.5 micron CMOS process, allowing efficient mixing of complex digital and sensitive analogue circuits. General characteristics of the physical interface are given in Table


The IEC 1334 standard defines a 3 layer protocol architecture, known as the collapsed architecture (figure 2). The application layer is directly connected to a data link layer (DLL) which controls the physical layer. The DLL is formed with two sub-layers – the medium access layer (MAC) and the logical link layer (LLC).

IEC Protocol


The PLC modem is able to handle the physical and MAC layers (figure 3). The physical layer generates and decodes the signal at the bit level, and ensures the synchronisation of the data to the mains frequency. Two synchronisation methods are offered, one based on the content of the preamble and the other on the content of the first transmitted frame.

Lower Layer Details The MAC layer handles the organisation of LLC frames exchanged between the application micro-controller into MAC physical sub-frames to the physical layers and vice versa. It performs the following functions:

  • Data encapsulation
  • Framing
  • Station addressing
  • Error detection and correction
  • Physical layer access management
  • LLC access management
  • Frames relaying

The last function allows automatic relay of messages to other stations on the network. This relay function, also known as repetition with credit, is specific to the IEC standard and allows the dimension of the physical network to be extended by allowing local repetition of messages.


Local communication is established through the serial interface port, which is used to configure the modem and to exchange the data frames between the modem and the local application controller. It is compatible with universal asynchronous receive transmit (UART) standards like RS232, and allows easy interfacing with low cost standard micro-controllers. The communication speed is programmable by setting two external pins to a speed between 4800 bits/s to 38 400 bits/s.

Services Structure

The modem controls communication on the serial interface. The application micro-controller is also able to initiate a communication on this line by pulling up the transmit request signal.

The software model uses four communication modes that cover all the configuration alternatives of a network connection – no set, slave, master and monitor. (Figure 4). The no set mode is activated at the power-up of the circuit. The master mode is the configuration that controls the communication on a network. The slave mode is the mode used at all the other points connected to a network. Finally the monitor mode is an additional mode in which the modem is able to listen to the data traffic on the network, without being allowed to send a message.

A number of services are available for each mode set.

  • Local transfer and configuration (LTC)
  • Medium access control (MAC)
  • Data base; and
  • SPY

The LTC services allow the transmission of the modem’s set-up and configuration services. The MAC services are able to exchange the data to transmit on the power line. The information is exchanged at the level of LLC frames, which contain up to 238 bytes. The CB services are created to access the local MIB and the local management data stored in the modem. Finally the SPY services are the dedicated services activated to run the monitoring of the data traffic on the network.

Table 2 – Narrow band SDR
Narrow interference frequency 300 bits/s SDR (dB) 600 bits/s SDR (dB) 1200 bits/s SDR (dB)
Noise at Mark frequency -36 -39 -35
Noise at (Mark+Space)/2 frequency -34 -38 -34
Noise at Space frequency -32 -37 -32


The performance of the circuit has been measured against several types of disturbance, and for the three available bit rates. Performances are defined for a given level of frame success rate (FSR). Measurements were performed for a space frequency of 47618Hz and mark frequency of 61905 Hz on the first component version we produced.

Table 3 – White noise SDR
White noise interference Noise at Mark frequency
300 bits/s SDR (dB) 6.5
600 bits/s SDR (dB) 12.5
1200 bits/s SDR (dB) 12.5

In table 2 the resistance to narrow band interference is quantified. In table 3, the sensitivity of the modem in noisy environments was tested by using white noise disturbers. The results are expressed in Signal to Disturber Ratio (SDR) obtained to get an FSR better than 90.


The co-existence of hardware, software and analogue blocks in the circuit raised important design issues. The software design, and especially the error-prone hardware/software integration, represent the major bottleneck in the embedded system design process. In the past, software and hardware were developed separately; the time associated with their integration represented 50% of total design time (figure 5).

Design Plan Improvement In A Co-Design Environment Co-Design Environment

A co-design and co-simulation environment was used for the design of this PLC modem (figure 6). This environment encapsulates the core processor, its associated development tools and the process related libraries and hardware coded functional blocks. It allows an inter-active hardware/software partitioning, the implementation of the hardware and software and an easy synthesis of the hardware/software interfaces. The designer can perform the same tasks in a time period reduced by about 40%, assisted by system level engineers closer to the real application needs.


A typical application for the ‘network termination’ in a remote reading of a residential electricity meter is give in figure 7.

Figure 7: Application Schematic

In this case the modem is configured in the slave mode. The connection to the power line is realised by using an external line driver and inductive coupling – in this case the MTC-3058 integrated PLC line driver. The passive coupling circuit is formed with a line transformer with a ratio of 2 and a high voltage capacitor placed in parallel.

The interface between the modem and the line driver is achieved with external components. The components combined with the amplifiers integrated in the modem devices form efficient filters to attenuate the 50 Hz and its harmonics energy.

The application micro-controller is interfaced to three utility meters by using the S0 – an electromechanical interface where the measurement of energy or flow is obtained by sending pulses. This application shows how existing systems can take advantage of communication technologies; as an example, the interfacing of fully electronic static meters will be even easier.


This is the first example of a new product line. The flexibility of the architecture allows the development of other applications. In the utility frequency band, alternate modulation techniques like FSK and spread spectrum can be implemented. The same architecture can be used in the domotic area. The modular approach used during design, as well as considerable design flexibility, make all these adaptations easy to implement. New applications are obtained by means of digital filtering and firmware adaptation from the core blocks.

This chip is being intensively tested by major utility companies and manufacturers in Europe.